ILA and VIO Debug IP Cores - 2024.1 English

ISE to Vivado Design Suite Migration Guide (UG911)

Document ID
UG911
Release Date
2024-05-30
Version
2024.1 English

Use the Vivado logic analyzer to interact with the ILA v2.0 (or later) and/or VIO v2.0 (or later) debug IP cores.

The following table shows the logic debug IP core compatibility with run time tools.
Table 1. Debug IP Core and Run Time Tool Requirements
Debug IP Core and Version Run Time Tool Requirement
AXI ChipScope Monitor, v3.05a (or earlier) ChipScope Pro Analyzer
Integrated Controller (ICON), v1.06a (or earlier) ChipScope Pro Analyzer
Integrated Logic Analyzer (ILA), v1.05a (or earlier) ChipScope Pro Analyzer
Integrated Logic Analyzer (ILA), v2.0 (or later) Vivado logic analyzer
Virtual Input/Output (VIO), v1.05a (or earlier) ChipScope Pro Analyzer
Virtual Input/Output (VIO), v2.0 (or later) Vivado logic analyzer