The PlanAhead™ tool assists in converting UCF constraints to XDC when you open an ISE Design Suite or PlanAhead tool project that contains UCF constraints.
When a design is loaded into the database, you use the write_xdc
command to convert a large percentage of the UCF constraints. You need to manually
verify the output file and manually convert some constraints to XDC to ensure that
all the design constraints are correct.
The Tcl command write_xdc
requires that a
synthesized netlist be open with one or more UCF files loaded. From the PlanAhead
tool, do the following:
- Open your project that contains UCF constraints.
- Click Open Synthesized Design.
- In the Tcl
Console, type:
write_xdc <filename>.xdc
The write_xdc
command is not a file converter. The command
writes out the constraints that were successfully applied to the design as an XDC
file. The output XDC file contains:
- A comment with the file and line number from the UCF for each converted UCF.
- A comment for each conversion not done.Important: Pay attention to Critical Warnings that indicate which constraints were not successfully converted.
This conversion is only a starting point for migration to XDC-based constraints.
Recommended: Create XDC timing constraints without using the conversion process, because fundamental differences between UCF and XDC make automation less than optimal. - Using the PlanAhead tool for converting UCF is best for physical constraints and
basic timing constraints. Timing constraints for simple clock definitions and
I/O delays typically translate well.Important: Convert timing exceptions manually. Many do not translate and others can produce sub-optimal results.
- Fundamental differences between the timer in the Vivado IDE (XDC/SDC) and the timer in ISE Design Suite (UCF) make direct translation impossible. For that reason the UCF constraint must be re-evaluated and a new approach might be required with XDC. Conversion can be done with an elaborated RTL design; however, many objects referenced in a typical UCF do not exist at that stage and thus are not applied to the database.
- Only constraints that are successfully applied to the database can be written out as XDC. Consequently simple clock and I/O delay constraints typically can be translated from an elaborated RTL design.