Device Power and the Overall System Design Process - 2022.1 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2022-06-08
Version
2022.1 English

From project conception to completion, various aspects of the design process affect power. For details, see this link in the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).

Power Tip: During the design process, you can compare the total power of the design to the power budget using the set_operating_conditions -design_power_budget <Power in Watts> XDC constraint. If the power budget is exceeded, early intervention is the easiest way to correct design power.