After the clock network report shows that all clock networks are constrained, you
can begin verifying the accuracy of the generated clocks. Because the Vivado tools automatically propagate clock constraints
through clock-modifying blocks, it is important to review the constraints that were
generated. Use report_clocks
to show which clocks were
created with a create_clock
constraint and which clocks
were generated.
The report_clocks
results show that all clocks are propagated. The difference between the primary clocks (created with create_clock
) and the generated clocks is displayed in the attributes field:
- Clocks that are propagated (P) only are primary clocks.
- Clocks that are derived from other clocks are shown as both propagated (P) and generated (G).
- Clocks that are generated by a clock-modifying block are shown as auto-derived (A).
- Other attributes indicate that an auto-derived clock was renamed (R), a generated clock has an inverted waveform (I) relative to the incoming master clock, or a primary clock is virtual (V).
You can also create generated clocks using the create_generated_clock
constraint. For more information, see the
Vivado Design Suite User Guide: Using
Constraints (UG903).
no_clock
category). The report is available from within the Report
Timing Summary or by using the check_timing
Tcl
command.