s_axilite
interface
as discussed in Creating User-Managed RTL Kernels. If your RTL module
implements a different control structure, you can define it as a user_managed
kernel or it must be adapted to conform to the XRT-managed requirements
described here.The following table outlines the required register map for an XRT-managed
kernel to be used within the Vitis tools and XRT. The
control register is required by kernels that specify ap_ctrl_hs
and ap_ctrl_chain
control protocols as
described in Execution Modes. Kernels that implement ap_ctrl_none
and user_managed
control protocols do
not require the control registers described below.
All user-defined registers must begin at location 0x10
; locations below this are reserved. These include registers for kernel arguments
such as scalar values and address offsets passed to memory mapped interfaces.
Offset | Name | Description |
---|---|---|
0x0 | Control | Controls and provides kernel status. |
0x4 | Global Interrupt Enable | Used to enable interrupt to the host. |
0x8 | IP Interrupt Enable | Used to control which IP generated signals are used to generate an interrupt. |
0xC | IP Interrupt Status | Provides interrupt status. |
0x10 | Kernel arguments | This would include scalars and global memory arguments for example. |
The following table shows the control signals that are accessed through the
control register (offset 0x0
). The control register and its
signals are determined by the kernel execution mode, ap_ctrl_hs
and ap_ctrl_chain
.
The available signals are used by the different control protocols as
explained in Supported Kernel Execution Models in the XRT documentation. For
example, for the sequential execution mode ap_ctrl_hs
the host
typically writes 0x00000001
to the offset 0 control register
which sets Bit 0, clears Bits 1 and 2, and polls on reading ap_done
signal until it is a 1.
Bit | Name | Description |
---|---|---|
0 | ap_start | Asserted when the kernel can start processing data. Cleared on handshake with ap_done being asserted. |
1 | ap_done | Asserted when the kernel has completed operation. Cleared on read. |
2 | ap_idle | Asserted when the kernel is idle. |
3 | ap_ready | Asserted by the kernel when it is ready to accept the new data |
4 | ap_continue | Asserted by the XRT to allow kernel keep running |
7 | auto_restart | Used to enable automatic kernel restart as described in Working with Auto-Restarting Kernels. |
31:5 | Reserved | Reserved |
The following interrupt related registers are only required if the kernel has an interrupt.
Bit | Name | Description |
---|---|---|
0 | Global Interrupt Enable | When asserted, along with the IP Interrupt Enable bit, the interrupt is enabled. |
31:1 | Reserved | Reserved |
Bit | Name | Description |
---|---|---|
0 | Interrupt Enable | When asserted, along with the Global Interrupt Enable bit, the interrupt is enabled. |
31:1 | Reserved | Reserved |
Bit | Name | Description |
---|---|---|
0 | Interrupt Status | Toggle on write. |
31:1 | Reserved | Reserved |