Methodology for Accelerating Data Center Applications with the Vitis Software Platform provides an overview of designing an application beginning with profiling the application to identify functions to accelerate, leading into recommended ways of developing C/C++ accelerators. As discussed in the this guide, it is very important to understand the architecture and performance of your application before you start any optimization effort. This is achieved by establishing a baseline for the application in terms of functions and performance.
Identify Bottlenecks
The first step is to identify the bottlenecks of the your application running
on your target platform. The most effective way is to run the application with profiling tools
like the user profiling features described in Custom Profiling of the Host Application,
or valgrind, callgrind, and GNU
gprof. The profiling data generated by these tools show the
call graph with the number of calls to all functions and their execution time.
Run Software and Hardware Emulation
Run software and hardware emulation on the accelerated application as described in Running Emulation, to verify functional correctness, and to generate profiling data on the host code and the kernels. Use Vitis analyzer to review the kernel compilation reports, profile summary, timeline trace, and device hardware transactions to understand the baseline performance estimate for timing interval, latency, and resource utilization, such as DSP and block RAM.
Build and Run the Application
The last step in baselining is building and running the application on an FPGA acceleration card, like one of the Alveo™ Data Center accelerator cards, as described in Running the Application Hardware Build. Analyze the reports from the Vitis compiler, and the profiling data from application execution to see the actual performance and resource utilization on hardware.