Assigning AXI Interfaces to PLRAM - 2022.1 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

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2022.1 English

Some platforms support PLRAMs. In these cases, use the same --connectivity.sp option as described in Assigning AXI Interfaces to DDR Banks, but use the name, PLRAM[id]. Valid names supported by specific platforms can be found in the Memory Configuration section of the file generated alongside xclbin.