The AXI firewall should prevent host
hangs. This is why the AXI Protocol Firewall IP is included in all production Vitis platforms. When the firewall trips, one of the
first checks to perform is confirming if the host code and kernels are set up to use the
same memory banks. The following steps detail how to perform this check.
- Use
xbutil
to program the FPGA:xbutil program -p <xclbin>
- Run the
xbutil
query option to check memory topology:xbutil query
In the following example, there are no kernels associated with memory banks:
- If the host code expects any DDR banks/PLRAMs to be used, this report should
indicate an issue. In this case, it is necessary to check kernel and host code
expectations. If the host code is using the Xilinx
OpenCL extensions, it is necessary to check
which DDR banks should be used by the kernel. These should match the
connectivity.sp
options specified as discussed in Mapping Kernel Ports to Memory.