The Vitis unified software platform provides application-level debug features which allow the host code, the kernel code, and the interactions between them to be efficiently debugged in either the Vitis IDE, or from the command line. The recommended debugging flow consists of three levels of debugging:
- Debugging in Software Emulation to confirm the algorithm functionality of the application as represented in both your host program and kernel code.
- Debugging in Hardware Emulation to compile the kernel into RTL, confirm the behavior of the generated logic, and evaluate the simulated performance of the hardware.
- Debugging During Hardware Execution to implement the FPGA binary and debug the application running in hardware.
This three-tiered approach allows debugging the host and kernel code, and the interactions between them at different levels of abstraction. Each provides specific insights into the design and makes debugging easier. All flows are supported through an integrated GUI flow as well as through a batch flow using basic compile time and runtime setup options.
In the case of applications running on embedded processor platforms, some additional setup is required as described in Debugging on Embedded Processor Platforms.