XADC Operating Modes

7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480)

Document ID
UG480
Release Date
2022-06-09
Revision
1.11 English

Chapter 4

XADC Operating Modes

The XADC includes several operating modes that cover some of the most common use cases for this kind of functionality. The most basic mode of operation is called default mode , where the XADC monitors all on-chip sensors and requires no configuration of the XADC. In the simultaneous sampling mode , the sequencer is used to operate both ADCs in lock step to sample two external analog inputs and store results in the status registers.

The XADC operating modes can be used with either continuous or event-driven sampling modes unless otherwise noted.