Analog-to-Digital Converter

7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480)

Document ID
UG480
Release Date
2022-06-09
Revision
1.11 English

Chapter 2

Analog-to-Digital Converter

The XADC block contains two 12-bit, 1 MSPS ADCs. These ADCs are available for use with both external analog inputs and on-chip sensors. Several predefined operating modes are available that cover the most typical use cases for these ADCs. The various operating modes are covered in Chapter 4, XADC Operating Modes . This chapter focuses on the detailed operation of the ADC and the on-chip sensors. The various input configurations for the external analog inputs are also covered. All operating modes of the ADC, sensors, and analog inputs are configured using the XADC control registers. A detailed description of the control registers is covered in Chapter 3, XADC Register Interface .