Maximum and Minimum Status Registers

7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480)

Document ID
UG480
Release Date
2022-06-09
Revision
1.11 English

Maximum and Minimum Status Registers

The XADC also tracks the minimum and maximum values recorded for the internal sensors since the last power-up or since the last reset of the XADC control logic. The maximum and minimum values recorded are stored in the DRP status registers starting at address 20h (see Status Registers, page 30 ). On power-up or after reset, all minimum registers are set to FFFFh and all maximum registers are set to 0000h . Each new measurement generated for an on-chip sensor is compared to the contents of its maximum and minimum registers. If the measured value is greater than the contents of its maximum registers, the measured value is written to the maximum register. Similarly, for the minimum register, if the measured value is less than the contents of its minimum register, the measured value is written to the minimum register. This check is carried out every time a measurement result is written to the status registers.

Table 4-7: Maximum and Minimum Registers

Status Register

Description

20h

Temp max – Maximum temperature recorded

21h

V CCINT max – Maximum V CCINT recorded

22h

V CCAUX max – Maximum V CCAUX recorded

23h

V CCBRAM max – Maximum V CCBRAM recorded

24h

Temp min – Minimum temperature recorded

25h

V CCINT min – Minimum V CCINT recorded

26h

V CCAUX min – Minimum V CCAUX recorded

27h

V CCBRAM min – Minimum V CCBRAM recorded

28h

V CCPINT (1) max – Maximum V CCPINT recorded

29h

V CCPAUX (1) max – Maximum V CCPAUX recorded

2Ah

V CCO_DDR (1) max – Maximum V CCO_DDR recorded

2Bh

Unassigned

2Ch

V CCPINT (1) min – Minimum V CCPINT recorded

2Dh

V CCPAUX (1) min – Minimum V CCPAUX recorded

2Eh

V CCO_DDR (1) min – Minimum V CCO_DDR recorded

2Fh

Unassigned

Notes:

1. Only available on the Zynq-7000 SoC devices.