Table 1. Package Details (All Dimensions in mm)
| Package |
Size |
I/O |
Pitch |
Ball/Column Size |
Pad Opening |
Pad Type |
Die Size |
Substrate |
| SBG484 |
19 X 19 |
484 |
0.8 |
0.50 |
0.40 |
SMD |
10.82 x 12.04 |
0.98 thick, 8-layer |
Mother Board Design and Assembly Details
- 8-layer, FR-4, 220 x 140 x 2.36 mm size, ENIG finish
- 0.33 mm pad diameter/0.50 mm solder mask opening (NSMD pads)
- Board layer structure: signal/GND/signal/power/signal/GND/signal/power
- Power, GND layer has 70% metal. Internal signal layer has 40% metal.
Test Condition
- 0°C – 100°C, 40-minute thermal cycle, 10-minute dwells, 10°C/minute ramp rate
Failure Criteria
- Continuous scanning of daisy chain nets with event detector
- FAIL: Resistance of net > threshold resistance (500Ω), 10 events (maximum), 1 μs duration (maximum)
Table 2. Summary of Test Results
| Package |
Cycles Completed |
Number Tested |
Number Failed |
First Failure (Cycle) |
Characteristic Life (Cycle) |
| SBG484 |
6,827 |
32 |
23 |
4,499 |
6,608 |
Weibull Plots
Figure 1. Cycles to Failure in the Second-Level Reliability Tests for
SBG484
