Device Reliability Report (UG116)

Document ID
Release Date
10.17 English
Table 1. Package Details (All Dimensions in mm)
Package Size I/O Pitch Ball/Column Size Pad Opening Pad Type Die Size Substrate
FFV1928 45 X 45 1924 1.00 0.60 0.53 SMD 23.85 x 21.65 1.33 thick, 12-layer

Mother Board Design and Assembly Details

  • 16-layer, Megtron 6, 220 x 140 x 2.4 mm size, OSP finish
  • 0.53 mm pad diameter/0.63 mm solder mask opening (NSMD pads)
  • Board layer structure: signal/GND/signal/power/signal/GND/signal/power
  • Power, GND layer has 70% metal. Internal signal layer has 40% metal.
  • 0.127 mm laser cut stencil, 0.50 mm aperture, alpha metals WS820 paste

Test Condition

  • 0°C–100°C, 40-minute thermal cycle, 10-minute dwells, 10°C/minute ramp rate

Failure Criteria

  • Continuous scanning of daisy chain nets with event detector
  • FAIL: Resistance of net > threshold resistance (500Ω) and lasting longer than 1 μs, followed by >9 events within 10% of the cycles to initial failure.
Table 2. Summary of Test Results
Package Cycles Completed Number Tested Number Failed First Failure (Cycle) Characteristic Life (Cycle)
FFV1928 9,490 32 25 5,635 9,275

Weibull Plots

Figure 1. Cycles to Failure in the Second-Level Reliability Tests for FFV1928