The HAST test is conducted under the conditions of 130°C, 85% RH and VDD bias or 110°C, 85% RH and VDD bias. Package preconditioning is performed on the testing samples
prior to the HAST test.
Summary
Table 1. Summary of High Accelerated Stress Test Results
| Device |
Stress Condition |
Lot Quantity |
Fail Quantity |
Device Quantity |
Total Device Cycles |
| XC3SxxxA |
110°C / 85%RH |
1 |
0 |
45 |
23,760 |
| XC6Sxxx |
110°C / 85%RH |
2 |
0 |
90 |
35,640 |
|
7 series FPGAs and Zynq 7000 SoCs
|
110°C / 85%RH |
6 |
0 |
264 |
139,392 |
Data
Table 2. HAST Test Results for XC3SxxxA
| Device |
Stress Condition |
Lot Quantity |
Fail Quantity |
Device Quantity |
Total Device Cycles |
| XC3S200A |
110°C / 85%RH |
1 |
0
|
45 |
23,760 |
| XC3SxxxA |
110°C / 85%RH |
1 |
0
|
45 |
23,760 |
Table 3. HAST Test Results for XC6Sxxx
| Device |
Stress Condition |
Lot Quantity |
Fail Quantity |
Device Quantity |
Total Device Cycles |
| XC6SLX45 |
110°C / 85%RH |
2 |
0
|
90 |
35,640 |
| XC6Sxxx |
110°C / 85%RH |
2 |
0
|
90 |
35,640 |
Table 4. HAST Test Results for 7 Series FPGAs and Zynq 7000 SoCs
| Device |
Stress Condition |
Lot Quantity |
Fail Quantity |
Device Quantity |
Total Device Cycles |
| XC7A35T |
110°C / 85%RH |
2 |
0
|
89 |
46,992 |
| XC7Z020 |
110°C / 85%RH |
4 |
0
|
175 |
92,400 |
|
7 series FPGAs and Zynq 7000 SoCs
|
110°C / 85%RH |
6 |
0
|
264 |
139,392 |