Event Trace Routing - 2023.2 English

AI Engine Tools and Flows User Guide (UG1076)

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2023.2 English

Enabling the event trace feature on designs can impact the routing of the AI Engine application. Extra resources are required to collect event information and pass it outside the AI Engine block. The routing phase occurs in two steps: the data-flow nets are routed first; and then the event trace signals are routed among the remaining unused paths.

In case all the trace nets could not be routed for a design with event trace enabled, the default behavior is as follows:

  • The AI Engine compiler issues a critical warning to indicate that all requested event trace signals could not be routed.
  • The AI Engine compiler then errors out.

An example of the Critical Warning is shown below, indicating the trace nets that failed to route.

CRITICAL WARNING: [aiecompiler 35-4476] Trace Net tr_net352 driven by AIE_ML_MEM_TILE_X9Y2/AIE_MEMGRP_M_TRACE_PIN failed to route. Design will not pass post route drc check.
CRITICAL WARNING: [aiecompiler 35-4476] Trace Net tr_net306 driven by AIE_ML_MEM_TILE_X9Y3/AIE_MEMGRP_M_TRACE_PIN failed to route. Design will not pass post route drc check.

To successfully route as many event trace nets as possible, AMD recommends using the option Xrouter=skipunroutabletracenets. When this option is used, the AI Engine compiler does not error out. It continues to route those trace nets that can be routed. A critical warning is provided for every trace net that cannot be routed.