This chapter describes the various execution targets available to simulate AI Engine applications at different levels of abstraction, accuracy, and speed. You can use four different simulation environments to simulate AI Engine graphs.
The x86 simulator is a fast-functional simulator as described in x86 Functional Simulator. Use the x86 simulator to functionally simulate your AI Engine graph. The x86 simulator is also useful for functional development and verification of kernels and graphs, however, it does not provide timing, resource, or performance information.
The AI Engine simulator (aiesimulator) models the timing and resources of the
AI Engine array. The AI Engine simulator uses transaction-level SystemC models for the NoC and
DDR memory. This allows for quick performance analysis of your AI Engine applications and accurate estimation of the AI Engine resource use, with cycle-approximate timing
information.
You can exercise the PL interface to AI Engine through untimed external traffic in both the x86 functional simulator and the
AI Engine simulator. Similarly, both simulators
use the user graph’s main() function as C-test bench to configure and
control the AI Engine. This test bench data input and
output is not timed, and the user graph’s main() function acts as a virtual simulation
platform.
Use the Vitis hardware emulation flow to simulate the entire system. This flow includes the AI Engine graph and PL logic, along with XRT-based host application to control the AI Engine and PL, for a specific board and platform. The flow includes the following components:
- The SystemC model of the AI Engine
- Transaction-level SystemC models for the NoC
- DDR memory
- PL Kernels (RTL)
- PS (running on QEMU)
Hardware emulation targets performing C-RTL co-simulation of the full system.
The following table lists the four simulation flows. The table details whether they support functional or performance-level debug, as well as the level of support for source code debug. The table also recommends the usage of these simulation flows in appropriate stages of your AI Engine design development.
| Design Development Stage | Simulation Tool Flow | Source Level Debug | Simulation Debug Type |
|---|---|---|---|
| AI Engine kernel and graph debug | x86 Simulator | Yes | AI Engine Functional Debug |
| AI Engine graph performance debug | AI Engine Simulator | Allows stepping through the AI Engine compiler generated assembly code which aids in code optimization, however, source level visibility could be limited due to compiler optimization | AI Engine Performance Analysis and Debug |
| System level simulation and performance debug | Vitis Hardware Emulation | Possible—however, provides limited source level visibility due to compiler optimization | System Performance Analysis and Debug |
Simulation Models
The following table lists the simulation flows and recommends the usage of these simulation flows in appropriate stages of your AI Engine design development and the type of simulation model used for the various AMD Versal™ architecture domains. The type of simulation model and the simulation tool flow determine the accuracy of the simulation results.
| Simulation Tool Flow | AI Engine Kernels | PL Kernels | PL I/O Support | PL Platform | NoC/DDR Model | PS Model |
|---|---|---|---|---|---|---|
| x86 Simulator | x86 threads | N/A | File IOs/External Traffic generators | N/A | N/A | N/A |
| AI Engine Simulator | SystemC | N/A | File IOs/External Traffic generators | N/A | SystemC | N/A |
| Vitis Hardware Emulation | SystemC | SystemC/RTL/HLS-C | PL Kernels/External Traffic generators | RTL/SystemC | SystemC | QEMU |
Simulation Features
You can obtain profiling data when you run your design in aiesimulator or hardware emulation. Analyzing the data
gauges kernel efficiency, identifies stall and active times for each AI Engine, and pinpoints
underperforming AI Engine
kernels. Analysis also allows you to collect data on design latency, throughput, and
bandwidth. Performance Analysis of AI Engine Graph Application during Simulation provides details on
running and analyzing profile data.
The event trace feature allows you to capture and analyze a system-level view of program execution. Event trace can be helpful in identifying problems during program execution including correctness and performance issues. The AI Engine architecture has direct support for generation, collection, and streaming of events as trace data during simulation and hardware emulation. Performance Analysis of AI Engine Graph Application during Simulation provides details on running and analyzing event trace data.
The x86simulator and aiesimulator simulate the design with the main() function of graph.cpp. QEMU emulation support is available for host applications
in hardware emulation. In hardware emulation, you can create a host application
targeting Bare metal or Linux-XRT, and also emulate the host application. Test bench
data can be provided to the x86 simulator and AI Engine simulator via the graph’s main() function which acts like a virtual test bench platform. There
are various levels of test bench support available for the simulation flows. Test
bench data can either be file-based or provided by an external traffic generator.
Using Traffic Generators for AI Engine
Designs in
Embedded Design Development Using Vitis (UG1701)
provides additional details on this feature.
The data flowing between the AI Engine kernels is available to view either as data snapshot files or in the Vitis IDE.
- Data Snapshots provides additional details on the x86 simulator snapshot feature.
- Trace View Data Visualization provides Additional information on data visualization of trace data on the results of running the AI Engine simulator.
The following table lists the type of simulation features supported with the four simulation flows.
| Simulation Tool Flow | Trace | Profile | Application main() | Test Bench Support | AI Engine Data Flow Visibility |
|---|---|---|---|---|---|
| x86 Simulator | No | No | The main() function in graph.cpp | File-based/External traffic generators | Yes (via the snapshot feature) |
| AI Engine Simulator | Yes | Yes | The main() function in graph.cpp | File-based/External traffic generators | Yes (via Trace view in the VitisIDE) |
| Vitis Hardware Emulation | Yes | Yes | The main() function in host application targeting BareMetal or Linux-XRT | HLS-C/RTL datamovers/external traffic generators | Yes (via Trace view in the Vitis IDE) |
main function
for simulation must have a return value. Otherwise, v++ -c
--mode aie errors out.