Event Trace Offload using High Speed Debug Port - 2023.2 English

AI Engine Tools and Flows User Guide (UG1076)

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2023.2 English

The high-speed debug port (HSDP) debug port provides debugging and trace capability for programmable logic (PL), processing system (PS), and AI Engines through a dedicated Aurora interface and a high-speed debug cable like SmartLynq+. The HSDP leverages the high-speed gigabit transceivers to make debug less intrusive to the system configuration.

The SmartLynq+ module is a high-speed debug and trace module, primarily targeting the AMD Versalâ„¢ adaptive SoC. It drastically improves configuration and trace speed. For trace capture, the SmartLynq+ module is capable of speeds up to 10 Gbps by means of its high-speed debug port (HSDP), which is 100 times faster than standard JTAG. Faster iterations and repetitive downloads increase development productivity and reduce the design cycle.

In the traditional hardware event trace, the trace information is stored in DDR memory available in the Versal device initially, and offloaded to SD card after the application run completes. This imposes limitations on the amount of trace information that can be stored and analyzed. AI Engine trace offload via HSDP has more DDR memory in the SmartLynq+ module and supports analyzing large quantities of trace information for complex designs. In addition, the SmartLynq+ module offers high bandwidth connectivity to offload trace information via HSDP which is faster.