TX_ST352_LINE Register (0x18) - 2.0 English

SMPTE UHD-Transmitter Subsystem LogiCORE IP Product Guide (PG289)

Document ID
PG289
Release Date
2024-05-30
Version
2.0 English
Table 1. TX_ST352_LINE Register Bit Mapping
Bits Name Access Default Value Description
31:27 Reserved RO 0 Reserved
26:16 TX_ST352_F2_LN R/W 0 Line number used to insert st352 packet for field 2
15:11 Reserved RO 0 Reserved
10:0 TX_ST352_F1_LN R/W 0 Line number used to insert st352 packet for field 1