AXI4S_VID_OUT_STS Register (0x6C) - 2.0 English

SMPTE UHD-Transmitter Subsystem LogiCORE IP Product Guide (PG289)
Document ID
PG289
Release Date
2024-05-30
Version
2.0 English

This register is available only when AXI4-Stream is selected.

Table 1. AXI4S_VID_OUT_STS Register Bit Mapping
Bits Name Access Default Value Description
31:0 AXI4S_VID_OUT_STS RO 0 Status[31:0] from AXI4-Stream to Video Out core