S_AXIS_STS_SB_TX Interface Signals - 2.0 English

SMPTE UHD-Transmitter Subsystem LogiCORE IP Product Guide (PG289)

Document ID
PG289
Release Date
2024-05-30
Version
2.0 English
Table 1. S_AXIS_STS_SB_TX Interface Signals
Signal I/O Description
S_AXIS_STS_SB_TX_tready O Core ready
S_AXIS_STS_SB_TX_tvalid I Data valid
S_AXIS_STS_SB_TX_tdata[31:0] I

Sideband signal information from transceiver block

Bit 0 - txchangedone

Bit 1 - txchangefail

Bit 2 - txresetdone

Bit 3 - slewrate

Bits [5:4] - txpllclksel

Bits [7:6] - txsysclksel

Bit 8 - tx_fabric_rst

Bit 9 - drpfail

Bits [11:10] - Unused

Bits [14:12] - txchangefailcode

Bit 15 - Unused

Bits [23:16] - drpfailcnt

Bit 24 - qpll0lock

Bit 25 - qpll1lock

Bit 26 - cplllock

Bits [31:27] - Unused