SS_CONFIG Register (0x40) - 2.0 English

SMPTE UHD- Transmitter Subsystem LogiCORE IP Product Guide (PG289)

Document ID
PG289
Release Date
2024-12-11
Version
2.0 English
Table 1. SS_CONFIG Register Bit Mapping
Bits Name Access Default Value Description
31:6 Reserved RO 0 Reserved
5 TX_INSERT_C_STR_ST352 RO 0 Set if the subsystem is generated with Insert ST352 in C stream
4 ANC_IF RO 0 ANC Interface Enable
3:2 VID_INTF RO 0

Video Interface

2'b00 : AXI4-Stream interface

2'b01 : Native video interface

2'b10 : Native SDI interface

1 INC_TX_EDH_PROC RO 1 Set if the IP core is generated with INCLUDE_TX_EDH_PROCESSOR
0 Reserved RO 0 Reserved