PS CAN FD Controller Interface

Versal Premium Series Data Sheet: DC and AC Switching Characteristics (DS959)

Document ID

DS959

Release Date

2024-06-25

Revision

1.7 English

Table 1. CAN FD Controller Interface
Symbol	Description¹	Min	Max	Units
F_{CAN_FD_REFCLK} ²	CAN FD reference clock frequency 1x	–	80	MHz
F_{CAN_FD_REFCLK} ²	CAN FD reference clock frequency 2x	–	160	MHz
T_{CAN_FD_PWRX}	Receive pulse width	125	–	ns
T_{CAN_FD_PWTX}	Transmit pulse width	125	–	ns
The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a 15 pF load. The APB interface (LPD_LSBUS_CLK) operating frequency must be greater than or equal to the CAN FD operating frequency (which is the CAN_FD_REFCLK frequency divided by the CAN[0\|1]_REF_CTRL[DIVISOR]).