Symbol | Description | Device | Performance as a Function of Speed Grade and Operating Voltage (VCCINT) | Units | ||||||
---|---|---|---|---|---|---|---|---|---|---|
0.88V (H) | 0.80V (M) | 0.725V (L) | 0.70V (L) | |||||||
-3 | -2 | -2 | -1 | -2LLI | -2 | -1 | ||||
Maximum achievable global clock frequency depends on span of the clock tree. The following table lists both the maximum switching frequencies for each buffer type and the maximum achievable frequency for the worst-case clock route spanning the entire device. Refer to the Versal Adaptive SoC Clocking Resources Architecture Manual (AM003) for more information. | ||||||||||
FMAX |
Maximum frequency of global clock switching characteristics for:
|
All | 1150 | 1150 | 1070 | 984 | 800 | 800 | 680 | MHz |
Maximum frequency of global clock switching characteristics for GTYP or GTM clock buffer with clock enable and clock input divide capability (BUFG_GT and MBUFG_GT) | All | 1150 | 1150 | 1070 | 984 | 1000 | 1000 | 680 | MHz | |
FMAX |
Maximum frequency of global clock switching characteristics for the worst-case clock route spanning the entire device:
|
XCVP1002 | N/A | 1150 | 1070 | 984 | 800 | 800 | 680 | MHz |
XCVP1052 | N/A | 1150 | 1070 | 984 | 800 | 800 | 680 | MHz | ||
XCVP1102 | 1080 | N/A | 1040 | 984 | N/A | 800 | 680 | MHz | ||
XCVP1202 | 1000 | N/A | 1000 | 984 | N/A | 800 | 680 | MHz | ||
XCVP1402 | 960 | N/A | 920 | 920 | N/A | 800 | 680 | MHz | ||
XCVP1502 | 800 | N/A | 800 | 800 | N/A | 800 | 680 | MHz | ||
XCVP1552 | 800 | N/A | 800 | 800 | N/A | 800 | 680 | MHz | ||
XCVP1702 | 700 | N/A | 700 | 700 | N/A | 700 | 680 | MHz | ||
XCVP1802 | 600 | N/A | 600 | 600 | N/A | 600 | 600 | MHz | ||
XCVP1902 | 600 | N/A | 600 | 600 | N/A | 600 | 600 | MHz | ||
XCVP2502 | 800 | N/A | 800 | 800 | N/A | 800 | 680 | MHz | ||
XCVP2802 | 600 | N/A | 600 | 600 | N/A | 600 | 600 | MHz |