Generating VCD with Select Signals - 2023.2 English

AI Engine Tools and Flows User Guide (UG1076)

Document ID
UG1076
Release Date
2023-12-04
Version
2023.2 English

When --dump-vcd option is provided to the aiesimulator all (except CLK,STREAM_SWITCH) signals are generated in the VCD file. This could slow down simulation. Alternatively, using options to dump only select signals associated with specific modules can improve simulation speed. To debug a design, it is recommended that you run aiesimulator with --dump-vcd to dump all the signals. After the issue is narrowed down, run the aiesimulator with options to only dump a subset of VCD signals. This can be achieved by passing aiesimulator with specific options through an options text file. Signals are selected based on the options provided in the text file.

To enable VCD dump for specific modules, select the module type in a text file, and pass the file an input to the aiesimulator command line. The contents of the file is merged into the generatedaie_simulator/aiesim_options.txt. The usage of this file in the HW emulation flow remains the same. Options passed to the aiesimulator command line will have higher precedence over the same options provided in the options file.

 aiesimulator --options-file=<user_aiesim_options.txt> --dump-vcd=<file_name>

The list of selections can be found below. By default, all modules except CLK and STREAM_SWITCH are set to true. Set the option to false to turn off modules.

Row/Column Selection

AIE_DUMP_VCD_ROW=(<row start index>,<row end index>),( <row start index>,<row end_index>)...
AIE_DUMP_VCD_COL=(<column start index>,<column end index>),( <column start index>,<column end_index>)...
Row
Use AIE_DUMP_VCD_ROW to generate VCD data for all the active cores in the selected row. You must specify absolute coordinates that consider shim interface row as row 0.

Example: To generate VCD data for active cores present between rows 1 to 4 , specify it as AIE_DUMP_VCD_ROW=(2,5) in the options.txt file.

Column
Use AIE_DUMP_VCD_COL to generate VCD data for all the active cores present in the selected column.

Example: To generate VCD data for active cores present between columns 23 to 26, specify it as AIE_DUMP_VCD_COL=(23,26) in the options.txt file.

Time interval
Use AIE_DUMP_VCD_INTERVAL to generate VCD data for a given time period. The VCD file generated will contain data related to all active cores for the selected time period. Only one time period specification is supported.
Note: End time -1 will mean end of simulation.

Example: To generate VCD data from 600 ns to 700 ns, use AIE_DUMP_VCD_INTERVAL=(600,701).

Tile Type Selection

AIE_DUMP_VCD_CORE=true/false   
AIE_DUMP_VCD_SHIM=true/false 
AIE_DUMP_VCD_MEM=true/false (valid for AIEngine ML designs only)
Core
Use AIE_DUMP_VCD_CORE to generate VCD data with signals associated with processor modules, programs and data memory.
Shim
Use AIE_DUMP_VCD_SHIM to generate VCD data with signals associated with all shim tiles.
Mem
Use AIE_DUMP_VCD_MEM to generate VCD data with signals associated with all mem tiles. This option valid for AI Engine-ML designs only.

Tile Submodule Selection

To output VCD data around tile submodules, you must select the tile type category described above.

AIE_DUMP_VCD_IO=true/false
AIE_DUMP_VCD_DMA=true/false
AIE_DUMP_VCD_STREAM_SWITCH=true/false
AIE_DUMP_VCD_CLK=true/false

This categorization of module signals is directly related to the category of the information shown on the Analysis View of the Vitis unified IDE:

I/O
Use AIE_DUMP_VCD_IO to generate VCD data with signals associated with AI Engine kernel input/output, locks, stalls. To generate this VCD data you must specify this option with any one of the tile type options: AIE_DUMP_VCD_CORE, AIE_DUMP_VCD_SHIM, or AIE_DUMP_VCD_MEM.
DMA
Use AIE_DUMP_VCD_DMA to generate VCD data with signals associated with DMA transfers, and locks. To generate this VCD data you must specify this option with any one of the tile type options: AIE_DUMP_VCD_CORE, or AIE_DUMP_VCD_MEM.
Stream Switch
Use AIE_DUMP_VCD_STREAM_SWITCH to generate VCD data with signals associated with all the streams on the stream switch boundary. To generate this VCD data you must specify this option with any one of the tile type options: AIE_DUMP_VCD_CORE, AIE_DUMP_VCD_SHIM, or AIE_DUMP_VCD_MEM.
Clock
Use AIE_DUMP_VCD_CLK to generate VCD data for the clock signal.