Generation of AUX Transactions - 3.0 English

DisplayPort 1.4 TX Subsystem Product Guide (PG299)
Document ID
PG299
Release Date
2022-05-04
Version
3.0 English

Generation of AUX transactions are described in the following table.

Table 1. Generation of AUX Transactions
Set up I2C slave for Write to address defined
Transaction Write Address only with MOT = 1
  1. Write AUX Address register (0x108) with device address.
  2. Issue command to transmit transaction by writing into AUX command register (0x100). Bit[12] must be set to 1.
AUX Transaction START -> CMD -> ADDRESS -> STOP
I2C Transaction START -> DEVICE_ADDR -> WR -> ACK/NACK
Set up I2C slave for Read to address defined
Transaction Read Address only with MOT = 1
  1. Write AUX Address register with device address.
  2. Issue command to transmit transaction by writing into AUX command register. Bit [12] must be set to 1.
AUX Transaction START -> CMD -> ADDRESS -> STOP
I2C Transaction START -> DEVICE_ADDR -> RD -> ACK/NACK
To stop the I2C slave, used as Abort or normal stop
Transaction Write/Read Address only with MOT = 0
  1. Write AUX Address register (0x108) with device address.
  2. Issue command to transmit transaction by writing into AUX command register (0x100). Bit[12] must be set to 1.
AUX Transaction START -> ADDRESS -> STOP
I2C Transaction STOP
Set up I2C slave write data
Transaction Write with MOT = 1
  1. Write AUX Address register (0x108) with device address.
  2. Write the data to be transmitted into AUX write FIFO register (0x104).
  3. Issue write command and data length to transmit transaction by writing into AUX command register (0x100). Bits[3:0] represent length field.
AUX Transaction START -> CMD -> ADDRESS -> LENGTH -> D0 to DN -> STOP
I2C Transaction

I2C bus is IDLE or New device address

START -> START/RS -> DEVICE_ADDR -> WR -> ACK/NACK -> DATA0 -> ACK/NACK to DATAN -> ACK/NACK

I2C bus is in Write state and the same device address

DATA0 -> ACK/NACK to DATAN -> ACK/NACK

Set up I2C slave write data and stop the I2C bus after the current transaction
Transaction Write with MOT = 0
  1. Write AUX Address register (0x108) with device address.
  2. Write the data to be transmitted into AUX write FIFO register (0x104).
  3. Issue write command and data length to transmit transaction by writing into AUX command register (0x100). Bits[3:0] represent length field.
AUX Transaction START -> CMD -> ADDRESS -> LENGTH -> D0 to DN -> STOP
I2C Transaction I2C bus is IDLE or Different I2C device address

START -> START/RS -> DEVICE_ADDR -> WR -> ACK/NACK -> DATA0 -> ACK/NACK to DATAN -> ACK/NACK -> STOP

I2C bus is in Write state and the same I2C device address

DATA0 -> ACK/NACK to DATAN -> ACK/NACK -> STOP
Set up I2C slave read data
Transaction Read with MOT = 1
  1. Write AUX Address register (0x108) with device address.
  2. Issue read command and data length to transmit transaction by writing into AUX command register (0x100). Bits[3:0] represent the length field.
AUX Transaction START -> CMD -> ADDRESS -> LENGTH -> STOP
I2C Transaction I2C bus is IDLE or Different I2C device address

START -> START/RS -> DEVICE_ADDR -> RD -> ACK/NACK -> DATA0 -> ACK/NACK to DATAN -> ACK/NACK

I2C bus is in Write state and the same I2C device address

DATA0 -> ACK/NACK to DATAN -> ACK/NACK
Set up I2C slave read data and stop the I2C bus after the current transaction
Transaction Read with MOT = 0
  1. Write AUX Address register (0x108) with device address.
  2. Issue read command and data length to transmit transaction by writing into AUX command register (0x100). Bits[3:0] represent the length field.
AUX Transaction START -> CMD -> ADDRESS -> LENGTH -> D0 to DN -> STOP
I2C Transaction I2C bus is IDLE or Different I2C device address

START -> START/RS -> DEVICE_ADDR -> RD -> ACK/NACK -> DATA0 -> ACK/NACK to DATAN -> ACK/NACK -> STOP

I2C bus is in Write state and the same I2C device address

DATA0 -> ACK/NACK to DATAN -> ACK/NACK -> STOP
Status of previous write command that was deferred or partially ACKED
Transaction Write Status with MOT = 1
  1. Write AUX Address register (0x108) with device address.
  2. Issue status update command to transmit transaction by writing into AUX command register (0x100). Bit[12] must be set to 1.
AUX Transaction START -> CMD -> ADDRESS -> STOP
I2C Transaction No transaction
Status of previous write command that was deferred or partially ACKED. MOT = 0 ensures that the bus returns to IDLE at the end of the burst.
Transaction Write Status with MOT = 0
  1. Write AUX Address register (0x108) with device address.
  2. Issue status update command to transmit transaction by writing into AUX command register (0x100). Bit[12] must be set to 1.
AUX Transaction START -> CMD -> ADDRESS -> STOP
I2C Transaction Force a STOP and the end of write burst