Creating Vitis Platforms Using Vivado/IP Integrator - 2022.2 English

Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994)

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2022.2 English

The Vitis™ unified software platform enables the development of embedded software and accelerated applications on heterogeneous Xilinx® platforms including FPGAs, SoCs, and Versal® ACAPs. In the Vitis software platform, the application running environment is referred to as the target platform. The target platform is a combination of hardware components (XSA) and software components (domains, boot components like FSBL and so on).

Platforms target any application implemented in hardware using the Vitis tools. Hardware components of a platform are designed using the Vivado® Design Suite and IP Integrator. Software components of a platform are likewise created using the Vitis or PetaLinux tool chain.

This chapter describes the flow to create and configure hardware components of a platform using the IP integrator. The design created using the IP integrator captures the logical and physical interfaces to the hardware functions coming from the Vitis environment. The processors, memory, and all external board interfaces are configured using a combination of Xilinx IP, custom IP, and RTL. This provides a logical wrapper for the hardware functions to be executed properly on the platform. Many configuration and customization options exist on the types of hardware functions being accelerated.

The embedded platform creation process is described in Creating Embedded Platforms in Vitis in the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393). This chapter covers the functionality available in Vivado to complete the hardware portion of the platform.