Selecting Simulation Model Type - 2022.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2022-04-21
Version
2022.1 English

To speed up the simulation run time, Xilinx provides transaction level simulation models (tlm) for certain IPs like Control, Interfaces and Processing System, SmartConnect, NoC, and AIE. You can select one of the supported simulation models for your IP by using either project property (PREFERRED_SIM_MODEL) or an IP property (SELECTED_SIM_MODEL). Following are the supported simulation models properties:

ALLOWED_SIM_MODELS
This is a read only property. It describes different simulation model types such as rtl, tlm, tlm_dpi, dpi which are available for a particular IP.
SELECTED_SIM_MODEL
This is an IP level setting which allows you to select and set one of the simulation model from the ALLOWED_SIM_MODELS.
PREFFERED_SIM_MODEL
This is a project level setting which allows you to set the default simulation model for the project. This is common across all IPs present in your project.