Global Set and Reset and Global 3-State Signals in Verilog - 2022.1 English

The GSR and GTS signals are defined in the <Vivado_Install_Dir>/data/verilog/src/glbl.v module.

In most cases, GSR and GTS need not be defined in the test bench.

The glbl.v file declares the global GSR and GTS signals and automatically pulses GSR for 100 ns.