CSU/PMU Register Access - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

Document ID
Release Date
2020.2 English

The following section discusses how to Read/Write the CSU and PMU global registers and provides a list of White and Black registers.

Register Write

$ echo > /sys/firmware/zynqmp/config_reg

Register Read

$ echo > /sys/firmware/zynqmp/config_reg 
$ cat /sys/firmware/zynqmp/config_reg

CSU and PMU global registers are categorized into two lists:

  • By default, the White list registers can be accessed all the time. The following is a list of white registers.
    • CSU Module:
      • Csu_status
      • Csu_multi_boot
      • Csu_tamper_trig
      • Csu_ft_status
      • Jtag_chain_status
      • Idcode
      • Version
      • Csu_rom_digest(0:11)
      • Aes_status
      • Pcap_status
    • PMU Global Module:
      • Global_control
      • Global_Gen_Storage0 - 6
      • Pers_Glob_Gen_Storage0-6
      • Req_Iso_Status
      • Req_SwRst_Status
      • Csu_Br_Error
      • Safety_Chk
  • The Black list registers can accessed when a compile time flag is set.

Every other register in both the CSU Module and the PMU_GLOBAL Module that is not covered in the above white list will be a black register. RSA and RSA_CORE module registers are black registers.

The #define option (SECURE_ACCESS_VAL) provides access to the black list. To access black list registers, build the PMU firmware with SECURE_ACCESS_VAL flag set.