Command List - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)
Document ID
UG1137
Release Date
2021-01-05
Version
2020.2 English

Get API Version

Get the API version.

$ echo pm_get_api_version > /sys/kernel/debug/zynqmp-firmware/pm

Request Suspend

Request another PU to suspend itself.

$ echo pm_request_suspend <node> > /sys/kernel/debug/zynqmp-firmware/pm

Self Suspend

Notify PMU that this PU is about to suspend itself.

$ echo pm_self_suspend <node> > /sys/kernel/debug/zynqmp-firmware/pm

Force Power Down

Force another PU to power down.

$ echo pm_force_powerdown <node> > /sys/kernel/debug/zynqmp-firmware/pm

Abort Suspend

Notify PMU that the attempt to suspend has been aborted.

$ echo pm_abort_suspend > /sys/kernel/debug/zynqmp-firmware/pm

Request Wake-up

Request another PU to wake up from suspend state.

$ echo pm_request_wakeup <node> <set_address> <address> > /sys/kernel/debug/zynqmp-firmware/pm

Set Wake-up Source

Set up a node as the wake-up source.

$ echo pm_set_wakeup_source <target> <wkup_node> <enable> > /sys/kernel/debug/zynqmp-firmware/pm

Request Node

Request to use a node.

$ echo pm_request_node <node> > /sys/kernel/debug/zynqmp-firmware/pm

Release Node

Free a node that is no longer being used.

$ echo pm_release_node <node> > /sys/kernel/debug/zynqmp-firmware/pm

Set Requirement

Set the power requirement on the node.

$ echo pm_set_requirement <node> <capabilities> > /sys/kernel/debug/zynqmp-firmware/pm

Set Max Latency

Set the maximum wake-up latency requirement for a node.

$ echo pm_set_max_latency <node> <latency> > /sys/kernel/debug/zynqmp-firmware/pm

Get Node Status

Get status information of a node. (Any PU can check the status of any node, regardless of the node assignment.)

$ echo pm_get_node_status <node> > /sys/kernel/debug/zynqmp-firmware/pm

Get Operating Characteristic

Get operating characteristic information of a node.

$ echo pm_get_operating_characteristic <node> > /sys/kernel/debug/zynqmp-firmware/pm

Reset Assert

Assert/de-assert on specific reset lines.

$ echo pm_reset_assert <reset> <action> > /sys/kernel/debug/zynqmp-firmware/pm

Reset Get Status

Get the status of the reset line.

$ echo pm_reset_get_status <reset> > /sys/kernel/debug/zynqmp-firmware/pm

Get Chip ID

Get the chip ID.

$ echo pm_get_chipid > /sys/kernel/debug/zynqmp-firmware/pm

Get Pin Control Functions

Get current selected function for given pin.

$ echo pm_pinctrl_get_function <pin-number> > /sys/kernel/debug/zynqmp-firmware/pm

Set Pin Control Functions

Set requested function for given pin.

$ echo pm_pinctrl_set_function <pin-number> <function-id> > /sys/kernel/debug/zynqmp-firmware/pm

Get Configuration Parameters for the Pin

Get value of requested configuration parameter for given pin.

$ echo pm_pinctrl_config_param_get <pin-number> <parameter to get> > /sys/kernel/debug/zynqmp-firmware/pm

Set Configuration Parameters for the Pin

Set value of requested configuration parameter for given pin.

$ echo pm_pinctrl_config_param_set <pin-number> <parameter to set> <param value> > /sys/kernel/debug/zynqmp-firmware/pm

Control Device and Configurations

Control device and configurations and get configurations values.

$ echo pm_ioctl <node id> <ioctl id> <arg1> <arg2> > /sys/kernel/debug/zynqmp-firmware/pm
Table 1. IOCTLs in SDG
IOCTL_ID Name Description
0 IOCTL_GET_RPU_OPER_MODE returns current RPU operating mode (lockstep/split).
1 IOCTL_SET_RPU_OPER_MODE configures RPU operating mode (lockstep/split).
2 IOCTL_RPU_BOOT_ADDR_CONFIG configures RPU boot address
3 IOCTL_TCM_COMB_CONFIG configures TCM to be in split mode or combined mode
4 IOCTL_SET_TAPDELAY_BYPASS enable/disable tap delay bypass
5 IOCTL_SET_SGMII_MODE enable/disable SGMII mode for the GEM device
6 IOCTL_SD_DLL_RESET resets DLL logic for the SD device
7 IOCTL_SET_SD_TAPDELAY sets input/output tap delay for the SD device
8 IOCTL_SET_PLL_FRAC_MODE sets PLL mode
9 IOCTL_GET_PLL_FRAC_MODE returns current PLL mode
10 IOCTL_SET_PLL_FRAC_DATA sets PLL fraction data
11 IOCTL_GET_PLL_FRAC_DATA returns PLL fraction data value
12 IOCTL_WRITE_GGS writes value to GGS register
13 IOCTL_READ_GGS returns GGS register value
14 IOCTL_WRITE_PGGS writes value to PGGS register
15 IOCTL_READ_PGGS returns PGGS register value
16 IOCTL_ULPI_RESET performs the ULPI reset sequence for resetting the ULPI transceiver
17 IOCTL_SET_BOOT_HEALTH_STATUS sets healthy bit value to indicate boot health status to firmware.
18 IOCTL_AFI writes the afi values at given index
Table 2. Description of IOCTLs
IOCTL_ ID Name Description Arguments
Node_ID Arg1 Arg2 Return Value
0 IOCTL_GET_RPU_OPER_MODE returns current RPU operating mode (lockstep/split) unused unused unused Operating mode
  • 0: LOCKSTEP
  • 1: SPLIT
1 IOCTL_SET_RPU_OPER_MODE configures RPU operating mode (lockstep/split) unused Value of operating mode
  • 0: LOCKSTEP
  • 1: SPLIT
 unused unused
2 IOCTL_RPU_BOOT_AD DR_CONFIG configures RPU boot address NODE_RPU_0 NODE_RPU_1 Value to set for boot address
  • 0: LOVEC/TCM
  • 1: HIVEC/OCM
 unused unused
3 IOCTL_TCM_COMB_C ONFIG configures TCM to be in split mode or combined mode unused Value to set (Split/Combined)
  • 0: SPLIT
  • 1: COMB
 unused unused
4 IOCTL_SET_TAPDELAY_BYPASS enables/ disables tap delay bypass unused Type of tap delay
  • 0: NAND_DQS_IN
  • 1: NAND_DQS_OUT
  • - 2: QSPI
 Tap-delay Enable/ Disable
  • 0: DISABLE
  • 1: ENABLE
 unused
5 IOCTL_SET_SGMII_MO DE enables/ disables SGMII mode for the GEM device NODE_ETH_0, NODE_ETH_1, NODE_ETH_2, NODE_ETH_3 "GMII mode Enable/ Disable
  • 0: DISABLE
  • 1: ENABLE
 unused unused
6 IOCTL_SD_DLL_RESET resets DLL logic for the SD device NODE_SD_0, NODE_SD_1 SD DLL Reset type
  • 0: ASSERT
  • 1: RELEASE
  • 2: PULSE
 unused unused
7 IOCTL_SET_SD_TAPDE LAY sets input/ output tap delay for the SD device NODE_SD_0, NODE_SD_1 Type of tap delay to set
  • 0: INPUT
  • 1: OUTPUT
 Value to set for the tap delay unused
8 IOCTL_SET_PLL_FRAC_ MODE sets PLL mode unused PLL clock ID PLL Mode
  • 0: FRAC_MODE
  • 1: INT_MODE
 unused
9 IOCTL_GET_PLL_FRAC_ MODE returns current PLL mode unused PLL clock ID unused PLL Mode
  • 0: FRAC_MODE
  • 1: INT_MODE
10 IOCTL_SET_PLL_FRAC_ DATA sets PLL fraction data unused PLL clock ID PLL fraction data unused
11 IOCTL_GET_PLL_FRAC_ DATA returns PLL fraction data value unused PLL clock ID unused PLL fraction data
12 IOCTL_WRITE_GGS writes value to GGS register unused GGS register index (0/1/2/3) Register value to be written unused
13 IOCTL_READ_GGS returns GGS register value unused GGS register index (0/1/2/3) unused Register value
14 IOCTL_WRITE_PGGS writes value to PGGS register unused PGGS register index (0/1/2/3) Register value to be written unused
15 IOCTL_READ_PGGS

returns PGGS

register value

 unused PGGS register index (0/1/2/3) unused Register value
16 IOCTL_ULPI_RESET performs the ULPI reset sequence for resetting the ULPI transceiver unused unused unused unused
17 IOCTL_SET_BOOT_HEA LTH_STATUS sets healthy bit value to indicate boot health status to firmware unused healthy bit value unused unused
18 IOCTL_AFI writes the afi values at given index unused AFI register index (0 to 15) Register value to be written unused

Query Data

Request data from firmware.

$ echo pm_query_data <query id> <arg1> <arg2> <arg3> > /sys/kernel/debug/zynqmp-firmware/pm

Enable Clock

Enable the clock for a given clock node_id.

$ echo pm_clock_enable <clock id> > /sys/kernel/debug/zynqmp-firmware/pm

Disable Clock

Disable the clock for a given clock node_id.

$ echo pm_clock_disable <clock id> > /sys/kernel/debug/zynqmp-firmware/pm

Get Clock State

Get the state of clock for a given clock node_id.

$ echo pm_clock_getstate <clock id> > /sys/kernel/debug/zynqmp-firmware/pm

Set Clock Divider

Set the divider value of clock for a given clock node id.

$ echo pm_clock_setdivider <clock id> <divider value> > /sys/kernel/debug/zynqmp-firmware/pm

Get Clock Divider

Get the divider value of clock for a given clock node_id.

$ echo pm_clock_getdivider <clock id> > /sys/kernel/debug/zynqmp-firmware/pm

Set Clock Rate

Set the clock rate for a given clock node_id.

$ echo pm_clock_setrate <clock id> <clock rate> > /sys/kernel/debug/zynqmp-firmware/pm

Get Clock Rate

Get the clock rate for a given clock node_id.

$ echo pm_clock_getrate <clock id> > /sys/kernel/debug/zynqmp-firmware/pm

Set Clock Parent

Set the parent clock for a given clock node_id.

$ echo pm_clock_setparent <clock id> <parent clock id> > /sys/kernel/debug/zynqmp-firmware/pm

Get Clock Parent

Get the parent clock for a given clock node id.

$ echo pm_clock_getparent <clock id> > /sys/kernel/debug/zynqmp-firmware/pm
Note: Clock id definitions are available in the following file of the clock bindings documentation: Documentation/devicetree/bindings/clock/xlnx,zynqmp-clk.txt