Symmetric Multiprocessing (SMP) - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

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2020.2 English

SMP enables the use of multiple processors via a single operating system instance. The operating system handles most of the complexity of managing multiple processors, caches, peripheral interrupts, and load balancing.

The APU in the Zynq UltraScale+ MPSoCs contains four homogeneous cache coherent Arm Cortex-A53 processors that support SMP mode of operation using an OS (Linux or VxWorks). Xilinx and its partners provide operating systems that make it easy to leverage SMP in the APU. The following diagram shows an example of Linux SMP with multiple applications running on a single OS.

Figure 1. Example SMP Using Linux

This would not be the best mode of operation when there are hard, real-time requirements as it ignores Linux application core affinity which should be available to developers with the existing Xilinx software.