Frameworks for Multiprocessor Development - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

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2020.2 English

Xilinx provides multiple frameworks for Zynq UltraScale+ MPSoCs to facilitate the application development on the heterogeneous processors and Xilinx 7 series FPGAs. These frameworks are described as follows:

Hypervisor Framework
Xilinx provides the Xen hypervisor, a critical item needed to support virtualization on APU of Zynq UltraScale+ MPSoC. The Use of Hypervisors section covers more details.
Authentication Framework
The Zynq UltraScale+ MPSoC supports authentication and encryption features as a part of authentication framework. To understand more about the authentication framework, see Boot Time Security.
TrustZone Framework
The TrustZone technology allows and maintains isolation between secure and non-secure processes within the same system. See this whitepaper for more information.

Xilinx provides the trustzone support through the ArmĀ® Trusted Firmware (ATF) to maintain the isolation between secure and non-secure worlds. To understand more about ATF, see Arm Trusted Firmware.

Multiprocessor Communication Framework
Xilinx provides the OpenAMP framework for Zynq UltraScale+ MPSoCs to allow communication between the different processing units. For more details, see the Xilinx Quick Emulator User Guide: QEMU (UG1169)
Power Management Framework
The power management framework allows software components running across different processing units to communicate with the power management unit.