The following table shows the revision history for this document.
Section | Revision Summary |
---|---|
01/05/2021 Version 2020.2 | |
Entire document | Minor updates |
Libraries | Libraries are currently available in the OS and Libraries Document Collection (UG643). |
09/04/2020 Version 2020.1 | |
Platform Management Unit Firmware | Updated PMU Firmware Build Flags to add a new flag. |
Reset | Updated RPU Subsystem Restart for RPU only restart support details. |
XilSecure Library v4.3 | Added Additional References. |
XilFPGA Library v5.3 | Added Additional References. |
12/05/2019 Version 11.0 | |
Vitis Embedded Flow | Updated SDK flows to Vitis Embedded Flow throughout the document. |
06/26/2019 Version 10.0 | |
Software Stack | Updated Multimedia Stack Overview. |
System Boot and Configuration | Updated Miscellaneous Functions |
Platform Management Unit Firmware | Added CSU/PMU Register Access and updated PMU Firmware Build Flags |
Power Management Framework | Updated Sub-system Power Management |
Added appendix | |
01/18/2019 Version 9.0 | |
Programming View of Zynq UltraScale+ MPSoC Devices | Updated Boot Modes and System-Level Protections sections |
Development Tools | Added Device Tree Generator |
Software Stack | Removed XilRSA references |
Security Features | Updated Configuring XMPU Registers |
Platform Management | Updated Power Management Framework |
Platform Management Unit Firmware | Updated PMU Firmware Build Flags, FPD WDT, and PMU Firmware Memory Layout and Footprint |
Reset | Updated Warm Restart with a note about on-chip memory (OCM) |
Boot Image Creation | Removed content and updated the chapter with a short description and added a reference to the Bootgen user guide. |
06/22/2018 Version 8.0 | |
System Boot and Configuration | Added a note that SHA-2 will be deprecated from 2019.1 release with a recommendation to use SHA-3 |
Security Features | Added Enhanced RSA Key Revocation Support |
Platform Management Unit Firmware | Updated PMU firmware Signals PLL Lock Errors on PS_ERROR_OUT section and PMU firmware Loading Options |
05/04/2018 Version 7.0 | |
Security Features | Added BIF File for Obfuscated Form (Gray) Key Stored in eFUSE and updated deprecation of SHA-2 authentication |
Reset | Added Warm Restart |
Boot Image Creation | Updated Boot Image format documentation |
01/19/2018 Version 6.0 | |
Software Development Flow | Updated Bare Metal Application Development |
System Boot and Configuration | Updated Boot Flow and Boot Modes sections |
Security Features | Updated BIF File with Multiple AESKEY Files |
High-Speed Bus Interfaces | Updated Ethernet flow figures |
Boot Image Creation | Updated example for [fsbl_config] parameter |
11/15/2017 Version 5.0 | |
About This Guide | Updated Prerequisites |
Programming View of Zynq UltraScale+ MPSoC Devices | Updated Boot Process and Security sections |
Software Stack | Updated FreeRTOS Software Stack |
System Boot and Configuration | Added FSBL Build Process and Setting FSBL Compilation Flags sections. Updated Boot Modes |
Security Features | Updated Boot Time Security |
Platform Management | Platform Management in PS and PMU Firmware sections |
Platform Management Unit Firmware | Added new chapter |
Power Management Framework | Updated Zynq UltraScale+ MPSoC Power Management Software Architecture, Using the API for Power Management, Sub-system Power Management, and XilPM Implementation Details sections |
Boot Image Creation | Updated BIF File Parameters, Boot Image Format and Boot Header Table. |
05/03/2017 Version 4.0 | |
Programming View of Zynq UltraScale+ MPSoC Devices | Added Boot Process |
Software Stack | Added information about Linux software stack exception levels EL0-EL3. |
System Boot and Configuration | Added QSPI24 and QSPI32 Boot Modes, eMMC18 Boot Mode, JTAG Boot Mode, USB Boot Mode. Updated Setting FSBL Compilation Flags to include FSBL_USB_EXCLUDE. |
Security Features | Added Bitstream Authentication Using External Memory, System Memory Management Unit, A53 Memory Management Unit, and R5 Memory Protection Unit. Updated Encryption and Authentication sections. |
Boot Image Creation | Added parameters and descriptions in Table 16-1. Added Boot Image Format. Added additional bit descriptions in Table 16-9. |
Added Appendixes for OS & Libraries content (Appendixes A-K). | |
12/15/2016 Version 3.0 | |
About This Guide | Updated Introduction |
System Boot and Configuration | Updated Boot Modes |
10/05/2016 Version 2.0 | |
Programming View of Zynq UltraScale+ MPSoC Devices | Updated Boot Modes and removed Interrupt Features. |
Development Tools | Added Vivado Design Suite. Modified Supported features in Xilinx Software Development Kit. Added a link to the SDK_Download. Replaced PetaLinux figure with table in Arm GNU Tools section. |
Software Stack | Added FreeRTOS Software Stack |
Software Development Flow | Removed Developing Open Source Software. |
Software Design Paradigms | Added Frameworks for Multiprocessor Development |
System Boot and Configuration | Modified SD Mode diagram, Figure 7-2. Modified NAND Mode diagram Figure 7-4. Removed Keys organization in the CSU and Wake UP Mechanisms. Added Pre-Boot Sequence. |
Security Features | Updated chapter and removed Encryption Key Types and Key Registers table. |
Platform Management | Added Power Management Framework and updated PMU Firmware |
DMA | Removed chapter |
System Coherency | Removed chapter |
Boot Image Creation | Added new chapter |
11/18/2015 Version 1.0 | |
Initial release. | N/A |