PMU Firmware Memory Layout and Footprint - 2020.2 English

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

Document ID
Release Date
2020.2 English

This section contains the approximate details of PMU firmware Memory Layout and also the Memory Footprint with various modules enabled.

In PMU RAM, some part is reserved for PBR leaving around 125.7 KB for PMU firmware. The following figure shows the memory layout of PMU RAM.

Figure 1. PMU Firmware Memory Layout

In PMU firmware, only PM module is enabled by default along with Base Firmware and all the other modules are disabled. See the PMU Firmware Build Flags section to know about the default setting of a module.

Note: All the metrics are with compilation optimized for size -Os. This optimization setting is enabled by default in the Vitis IDE. To disable the same, follow the steps mentioned in Enable/Disable Modules section.
Table 1. PMU Firmware Metrics
S.No Feature/Component Size Occupied (KB) Free Space (KB) Additional Notes Remarks
1 PMU firmware without detailed debug prints enabled 110.6 17.4 This is with base PMU firmware and PM module.
2 PMU firmware with detailed debug prints enabled 114.5 13.5 Detailed debug prints are enabled when XPFW_DEBUG_DETAILED flag is defined. This estimation is with combination of (1) and (2)
3 PMU firmware with Error Management Module enabled 113.6 14.4 Error Management module is enabled when ENABLE_EM and ENABLE_SCHEDULER flags are defined. This estimation is with combination of (1) and (3)
4 PMU firmware with Restart functionality enabled 115.8 12.2 Restart functionality is enabled when ENABLE_RECOVERY, ENABLE_ESCALATION and CHECK_HEALTHY_BOOT flags are defined along with EMABLE_EM and ENABLE_SCHEDULER flags. This estimation is with combination of (1) and (4)