New Step-on-First-Lock Clock Control Mode - UG1602

Enhanced PTP User Guide (UG1602)

Document ID
UG1602
Release Date
2024-12-19
Revision
1.2 English

Add step-on-first-lock mode to allow clock steps after first lock onto a PTP master. This mode addresses the unintuitive behavior of step-at-startup when there are multiple local clocks that have already been slewing to NIC.

See the clock_control option in Configuration Options.