System Design Types for Versal Devices without AI Engines - 2024.1 English

Versal Adaptive SoC System and Solution Planning Methodology Guide (UG1504)

Document ID
UG1504
Release Date
2024-05-30
Version
2024.1 English

Versal devices without AI Engines comprise traditional programmable logic fabric, memory (block RAM and UltraRAM), the network on chip (NoC), hardened DDR memory controller, a processing subsystem, and multiple hardened IP, such as PL PCIe® , CPM, multirate Ethernet MAC (MRMAC), 600G channelized multirate Ethernet subsystem (DCMAC), and High-Speed Crypto Engine (HSC).

For more information, see the following product selection guides:

  • Versal Prime Series Product Selection Guide (XMP453)
  • Versal Premium Series Product Selection Guide (XMP463)
  • Versal HBM Series Product Selection Guide (XMP465)