Examples of Traffic Flow Scenarios - 2024.1 English

Versal Adaptive SoC System and Solution Planning Methodology Guide (UG1504)

Document ID
UG1504
Release Date
2024-05-30
Version
2024.1 English

Following is a traffic analysis example for a PCIe interface-based system that captures the dataflow stages from external host to endpoint device over the PCIe link:

  1. PCIe interface-based DMAs write the data through the NoC to the DRAM.
  2. Accelerator block fetches data from the DRAM through the NoC and stores the data in on-chip memory.
  3. DRAM stores processed data.
  4. PCIe interface-based DMAs send the data back to the host DDR memory over the PCIe interface.
  5. Downstream PCIe interface interrupt notifies the host processor about the completion of the data transfer.

Following is a similar example for an embedded system design in which the primary data can originate from an ethernet interface or any secondary storage device:

  1. Embedded DMA device writes the data through the NoC to the DRAM.
  2. Accelerator hardware fetches data through the NoC and optionally, stores the data in on-chip memory.
  3. Data mover block writes the final output data from the accelerator block to the DRAM through the NoC.
  4. Data mover block notifies the embedded processor about the completion of the data transfer.