Run Power Estimation - 2024.1 English

Versal Adaptive SoC System and Solution Planning Methodology Guide (UG1504)

Document ID
UG1504
Release Date
2024-06-19
Version
2024.1 English

The foundation of board design is power estimation, which determines thermal, power delivery, and decoupling network requirements. Power estimation ideally constrains the design in the AMD Vivado™ tools or AMD Vitis™ environment to ensure a correct board design. Use the AMD Versal™ adaptive SoC Power Design Manager (PDM) tool to estimate power requirements. For more information, see the following resources:

  • Power Design Manager User Guide (UG1556)
  • Seven Steps to an Accurate Worst-Case Power Analysis using the Xilinx Power Estimator (XAPP1348)
  • Power page on the Xilinx website
  • Power Design Manager (PDM) tool (download at www.amd.com/power) page on the Xilinx website
Note: You can migrate existing AMD Zynq™ UltraScale+™ MPSoC designs to the Versal adaptive SoC PDM tool. However, ensure that your design takes advantage of the Versal adaptive SoC architectural blocks to maximize efficiency in your design.