Description
Sometimes C/C++ code is written with a sequence of operations, resulting in a long chain of operations in RTL. With a small clock period, this can increase the latency in the design. By default, the Vitis HLS tool rearranges the operations using associative and commutative properties. The rearrangement creates a balanced tree that can shorten the chain, potentially reducing latency in the design at the cost of extra hardware.
Expression balancing rearranges operators to construct a balanced tree and reduce latency.
- For integer operations expression balancing is on by default but can be disabled.
- For floating-point operations, expression balancing is off by default but can be enabled.
The syn.directive.expression_balance
command allows this expression balancing to be turned off, or on, within a specified
scope.
Syntax
syn.directive.expression_balance=[OPTIONS] <location>
-
<location>
is the location (in the formatfunction[/label]
) where expression balancing should be disabled, or enabled.
Options
-
off
- Turns off expression balancing at the specified location.
Examples
Disables expression balancing within function My_Func
.
syn.directive.expression_balance=off My_Func
Explicitly enables expression balancing in function My_Func2
.
set_directive_expression_balance=My_Func2