[
This Figure
, callout 7]
This is the primary Zynq UltraScale+ RFSoC PS-side UART interface and is connected to the FTDI U34 FT4232HL USB-to-Quad-UART bridge port B through TXS0108E level-shifter U21. The FT4232HL U34 port assignments are listed in
Table: FT4232HL Port Assignments
. The FT4232HL UART interface circuit is shown in
This Figure
.
Table 3-8:
FT4232HL Port Assignments
|
FT4232HL U34
|
Zynq UltraScale+ RFSoC U1
|
|
Port A JTAG
|
ZCU111 JTAG chain
|
|
Port B UART0
|
PS_UART0 (MIO 18-19)
|
|
Port C UART2
|
PL_UART2 bank 64
|
|
Port D UART3
|
U42 system controller UART
|
Figure 3-5:
ZCU111 FT4232HL UART Connections
|
X-Ref Target - Figure 3-5
|
The FT4232HL U34 UART connections are listed in
Table: FT4232HL UART Connections
.
Table 3-9:
FT4232HL UART Connections
|
FT4232HL U34 Pin
|
Schematic Net Name
|
Level Shifter
|
Level-Shifted Net Name
|
Target UART
Ref Des., Pin
|
|
26
|
LS_UART0_TXD_OUT
|
U21
|
UART0_TXD_MIO18_RXD
|
U1
|
Y27
|
|
27
|
LS_UART0_RXD_IN
|
U21
|
UART0_RXD_MIO19_TXD
|
U1
|
W28
|
|
38
|
LS_UART2_TXD_OUT
|
U21
|
UART2_TXD_FPGA_RXD
|
U1
|
AT15
|
|
39
|
LS_UART2_RXD_IN
|
U21
|
UART2_RXD_FPGA_TXD
|
U1
|
AU15
|
|
40
|
LS_UART2_RTS_B
|
U21
|
UART2_RTS_B
|
U1
|
AU14
|
|
41
|
LS_UART2_CTS_B
|
U21
|
UART2_CTS_B
|
U1
|
AT14
|
|
48
|
UART3_TXD_O_MSP430_UCA0_RXD
|
NA
|
NA
|
U42
|
26
|
|
52
|
UART3_RXD_I_MSP430_UCA0_TXD
|
NA
|
NA
|
U42
|
25
|
For more information on the FT4232HL, see the Future Technology Devices International Ltd website
[Ref 27]
.
