Programmable User SI570 Clock

ZCU111 Evaluation Board User Guide (UG1271)

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1.4 English

[ This Figure , callout 9]

The ZCU111 board has an I2C programmable SI570 low-jitter 3.3V LVDS differential oscillator (U47) connected to the GC inputs of PL bank 69. The USER_SI570_P and USER_SI570_N clock signals are connected to XCZU28DR RFSoC U1 pins J19 and J18, respectively. At power-up, the user clock defaults to an output frequency of 300.000 MHz. User applications can change the output frequency within the range of 10 MHz to 810 MHz through the I2C1 bus interface. Power cycling the ZCU111 board reverts this user clock to the default frequency of 300.000 MHz.

This oscillator can be reprogrammed from MSP430 system controller U42 (see TI MSP430 System Controller, page 88 for more system controller information and the ZCU111 web page for the tutorial on the system controller user interface (XTP517) [Ref 11] .

Programmable oscillator: Silicon Labs Si570BAB001614DG (10 MHz-810 MHz, 300 MHz default)

LVDS differential output

Total Stability: 61.5 ppm

The programmable user clock circuit is shown in This Figure .

Figure 3-14: Programmable User Clock

X-Ref Target - Figure 3-14