[ This Figure , callout 1]
The XCZU28DR provides 16 GTY transceivers (32.75 Gb/s capable) on the PL-side.
The GTY transceivers in the XCZU28DR are grouped into four channels or quads. The reference clock for a quad can be sourced from the quad above or the quad below the GTY quad of interest. The four GTY quads used on the ZCU111 board have the connectivity listed in this section.
• Quad 128:
• MGTREFCLK0 - SFP_SI5382_IN1_C_P/N
• MGTREFCLK1 - SFP_SI5382_OUT_C_P/N
• Contains four GTY transceivers allocated to SFP[0:3] TX/RX lanes
• Quad 129:
• MGTREFCLK0 - FMCP_HSPC_GBTCLK0_M2C_C_P/N
• MGTREFCLK1 - USER_MGT_SI570_CLOCK_C_P/N
• Contains four GTY transceivers allocated to FMCP_HSPC_DP[0:3] TX/RX
• Quad 130:
• MGTREFCLK0 - FMCP_HSPC_GBTCLK1_M2C_C_P/N
• MGTREFCLK1 - USER_SMA_MGT_CLOCK_C_P/N
• Contains four GTY transceivers allocated to FMCP_HSPC_DP[4:7] TX/RX
• Quad 131:
• MGTREFCLK0 - FMCP_HSPC_GBTCLK2_M2C_C_P/N
• MGTREFCLK1 - not connected
• Contains four GTY transceivers allocated to FMCP_HSPC_DP[8:11] TX/RX
This Figure shows the MGTY assignments.
