VHDL Syntax - 2024.1 English

Vivado Design Suite User Guide: Creating and Packaging Custom IP (UG1118)

Document ID
UG1118
Release Date
2024-05-30
Version
2024.1 English

The following VHDL example features a common block that delegates error handling, and prohibits decryption during simulation using the IEEE defined activity condition, for which AMD uses xilinx_activity.

Then, an AMD tool-specific block hides the configuration, prevents modification, and prevents probing of the encrypted logic. These are the three most-recommended AMD-specific rights. The tool-specific block also overrides the common block, granting the decryption right during simulation with the xilinx_activity condition. The code snippets that set these rights are highlighted in bold below:

`protect version = 2
`protect begin_commonblock
`protect control error_handling = "delegated"
`protect control decryption = (activity==simulation)? "false" : "true"
`protect end_commonblock
`protect begin_toolblock
`protect rights_digest_method="sha256"
`protect key_keyowner = "Xilinx", key_method = "rsa", key_keyname = "xilinxt_2019_11", key_keyowner
...
`protect control xilinx_configuration_visible = "false"
`protect control xilinx_enable_modification = "false"
`protect control xilinx_enable_probing = "false"
`protect control decryption = (xilinx_activity==simulation)? "false" : "true"
`protect end_toolblock = ""
`protect begin
-- Secure Data Block
-- Protected IP source code is inserted here.
...
...
...
`protect end