Supported IP Packager Inputs - 2024.1 English

Vivado Design Suite User Guide: Creating and Packaging Custom IP (UG1118)

Document ID
UG1118
Release Date
2024-05-30
Version
2024.1 English

The Vivado IP packager supports the following input file groups:

  • HDL synthesis
  • HDL simulation
  • Documentation
  • HDL test bench
  • Example design
  • Implementation files (including constraint and structural netlist files)
  • Drivers
  • GUI customization
  • Block Design (BD) files from Vivado IP integrator (including Modular Reference RTL)
    Note: For files which must be placed in specific directories, folder structures must be first created in the IP directory. One example might include driver files in a data directory.
    Tip: You can encrypt source files or modules and architectures defined within the source files to protect the IP. See Encrypting IP in Vivado for more information.

If you have -verilog_define options, create a Verilog header file and put those options there.

IP packager can designate as many or as few file groups as is appropriate to the IP. There is no requirement for a minimum set of file groups; however, the IP packager IP File Groups page presents a typical set of file groups, based upon the packaged project sources. When any of these file groups are empty, the final Review and Package page issues a warning about missing file.

Important: The Vivado IP packager does not support IP in the Core Container format. Disable the Core Container feature for all IP prior to packaging. For more information on Core Container, see the Vivado Design Suite User Guide: Designing with IP (UG896).