Memory Subsystem - 2.4 English

Video Processing Subsystem Product Guide (PG231)

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2.4 English

The memory subsystem in the Full Fledged and Deinterlacing Only designs consists of an AXI-MM interconnect that is a 3:1 cross-bar that feeds into the MIG. The 3 ports feeding into the cross bar are the data and instruction cache ports from the processor, and the memory port of the Video Processing Subsystem. For the Scaler Only, Color Space Conversion Only, and Chroma Resampling Only designs, the interconnect is a 2:1 cross bar.