The following table provides the register map of deinterlacer registers in video processing subsystem.
Register | Description |
---|---|
0x000 | Control signals
|
0x004 | Global Interrupt Enable Register
|
0x008 | IP Interrupt Enable Register (Read/Write)
|
0x00c | IP Interrupt Status Register (Read/TOW)
|
0x010 | Width
|
0x014 | Reserved |
0x018 | Height
|
0x01c | Reserved |
0x20 | Read Frame Buffer
|
0x024 | Read Frame Buffer
|
0x028 | Reserved |
0x030 | Color Format
|
0x034 | Reserved |
0x38 | Algorithm
|
0x03c | Reserved |
0x40 | Invert Field ID
|
0x044 | Reserved |
0x050 | Write Frame Buffer
|
0x054 | Write Frame Buffer
|
0x058 | Reserved |
|