420-422 Chroma Resampling Only - 2.4 English

Video Processing Subsystem Product Guide (PG231)
Document ID
PG231
Release Date
2024-02-21
Version
2.4 English

The following table provides the register map of 420-422 chroma resampling only registers in video processing subsystem.

Table 1. 420-422 Chroma Resampling Only Registers
Register Description
0x000 Control signals
  • bit 0 - ap_start (Read/Write/COH)
  • bit 1 - ap_done (Read/COR)
  • bit 2 - ap_idle (Read)
  • bit 3 - ap_ready (Read)
  • bit 7 - auto_restart (Read/Write)
  • Others - reserved
0x004 Global Interrupt Enable Register
  • bit 0 - Global Interrupt Enable (Read/Write)
  • Others - reserved
0x008 IP Interrupt Enable Register (Read/Write)
  • bit 0 - Channel 0 (ap_done)
  • bit 1 - Channel 1 (ap_ready)
  • Others - reserved
0x0c IP Interrupt Status Register (Read/TOW)
  • bit 0 - Channel 0 (ap_done)
  • bit 1 - Channel 1 (ap_ready)
  • Others - reserved
0x010 Width
  • bit 15~0 - HwReg_width[15:0] (Read/Write)
  • Others - reserved
0x014 Reserved
0x018 Height
  • bit 15~0 - HwReg_height[15:0] (Read/Write)
  • Others - reserved
0x01c Reserved
0x020 Input Video Format
  • bit 15~0 - HwReg_input_video_format[15:0] (Read/Write)
  • Others - reserved
0x024 Reserved
0x028 Output Video Format
  • bit 15~0 - HwReg_output_video_format[15:0] (Read/Write)
  • Others - reserved
0x02c Reserved
0x030 Coefficients 0
  • bit 15~0 - HwReg_coefs_0_0[15:0] (Read/Write)
  • Others - reserved
0x034 Reserved
0x038-0x0C8 Coefficients 1
  • bit 15~0 - HwReg_coefs_<P>_<T>[15:0] (Read/ Write)
  • Others - reserved
0xcc Reserved
  1. SC = Self Clear, COR = Clear on Read, TOW = Toggle on Write, COH = Clear on Handshake.