Programming the eFUSE Registers - 2021.2 English

To program the eFUSE registers, right-click the FPGA device in the Hardware window, select Program eFUSE Registers.

The Program eFUSE Registers wizard appears as shown in the following figure, and guides you to set the various options for the eFUSE registers.

In the AES Key Setup pane, specify the following settings:

In the Cryptographic Key Setup wizard pane, specify these key settings:

Cryptographic file key (.nky)

Specify a .nky file containing eFUSE AES and RSA keys

AES Key (256-bit)

The 256-bit AES eFUSE key read in from specified .nky file used to decrypt loaded encrypted bitstream.

RSA Key Digest (384-bit)

The 384-bit RSA eFUSE key read in from specified .nky file used by RSA.

• In the USER Register Setup wizard pane, specify the 32 bit USER or 128 bit USER register

  Figure 4. eFUSE USER Register Setup
  
  

In the USER register setup pane specify user define register bits. The 32 bit USER (FUSE_USER) and 128 bit USER register (FUSE_USER128) registers are a set of user defined one-time programmable eFUSE bits. The bits of these registers are cumulatively programmable. This means that if you program only one USER bit in an eFUSE programming session (e.g., USER = 0x0000_0001 or bit 0), then on subsequent eFUSE programming sessions you can program any of the remaining 0 bits (e.g., USER = 0x0000_0002 or bit 1).

After programming the FUSE_USER and FUSE_USER_128 registers, these registers can be read in several ways:

• Using the Tcl command

  report_property [lindex [get_hw_device] 0] REGISTER.EFUSE.FUSE_USER
  report_property [lindex [get_hw_devices] 0] REGISTER.EFUSE.FUSE_USER_128

• Through the Vivado Hardware Device Properties window after running a refresh_hw_device operation.

In the Control Register Setup wizard pane, specify the following settings:

In the Control Register Setup pane, specify the eFUSE control settings.

R_DIS_KEY

When set, disables CRC check that verifies the key & programming of the FUSE_KEY encryption key.

R_DIS_USER

When set, disables reading and programming the 32 bit user bits (FUSE_USER).

R_DIS_SEC

When set, disables reading and programming of the security register bits (FUSE_SEC).

R_DIS_RSA

When set, disables reading and programming of the RSA key register (FUSE_RSA).

W_DIS_USER

When set, disables programming of the 32 bit user bits (FUSE_USER).

W_DIS_SEC

When set, disables programming of the security register bits (FUSE_SEC).

W_DIS_RSA

When set, disables programming of the RSA key register (FUSE_RSA).

W_DIS_USER_128

When set, disables programming of the 128 bit user bits (FUSE_USER128).

For more details on the FUSE_SEC register refer to the UltraScale Architecture Configuration User Guide (UG570).