Generating an In-System IBERT Core Using the Vivado IP Catalog - 2021.2 English

Vivado Design Suite User Guide: Programming and Debugging

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2021.2 English

The first phase of debugging your design's high-speed serial I/O interfaces is to generate the In-System IBERT core.

To do this, follow these steps:

  1. Open the Vivado IDE
  2. On the first panel, choose Manage IP > New IP Location, then click Next when the Open IP Catalog wizard opens.
  3. Select the desired part, target language, target simulator, and IP location. Click Finish.
  4. In the IP Catalog under Debug and Verification > Debug , you will find one or more available In-System IBERT cores depending on the device selected in the previous step.
  5. Double-click the desired In-System IBERT architecture to open the Customize IP Wizard for that core

Customize the In-System IBERT core for your given hardware system requirements. For details on the In-System IBERT cores, see the In-System IBERT LogiCORE IP Product Guide (PG246).